The ALU will take in two 32-bit values, and 2 control lines. Depending on the value of the control lines, the output will be the addition, subtraction, bitwise AND or bitwise OR of the inputs. Schematically, here is what we want to build: Note! This is an interface for the ALU: what goes in, what comes out.. Circuit diagram of 2 bit ALU or Arithmetic logic unit using logic gates, multiplexer chips for easier 2 bit operation.
This presentation summarizes the design of a 2-bit arithmetic logic unit (ALU). It includes the group members, an overview of what an ALU is and its methodology. It shows the block diagram and needed integrated circuits. The circuit diagram, truth table, and how it works are described. Advantages like minimum delay and disadvantages like limited output are discussed. Verilog code for the ALU.. This repo contains the circuit diagrams of a 2-bit ALU with the following features: Addition Multiplication Division Comparison Left shift bitwise AND bitwise XOR The necessary documentation can be found here. Although I've made the best efforts to make these as error-free as possible, I do not guarantee the accuracy of these diagrams by any means.